Academic CS in Production Code

RL4ReAl: Reinforcement Learning for Register Allocation

Shalini Jain, Yashas Andaluri, S. VenkataKeerthy, Ramakrishna Upadrasta
2022
4 references

Abstract

We aim to automate decades of research and experience in register allocation, leveraging machine learning. We tackle this problem by embedding a multi-agent reinforcement learning algorithm within LLVM, training it with the state of the art techniques. We formalize the constraints that precisely define the problem for a given instruction-set architecture, while ensuring that the generated code preserves semantic correctness. We also develop a gRPC based framework providing a modular and efficient compiler interface for training and inference. Our approach is architecture independent: we show experimental results targeting Intel x86 and ARM AArch64. Our results match or out-perform the heavily tuned, production-grade register allocators of LLVM.

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⚙️ Classical Compilers
1 repository
4 references

Code References

▶ llvm/llvm-project
3 files
▶ llvm/docs/CommandGuide/llvm-ir2vec.rst
1
`RL4ReAl: Reinforcement Learning for Register Allocation <https://doi.org/10.1145/3578360.3580273>`_.
▶ llvm/docs/MLGO.rst
1
`RL4ReAl: Reinforcement Learning for Register Allocation <https://doi.org/10.1145/3578360.3580273>`_.
▶ llvm/include/llvm/CodeGen/MIR2Vec.h
2
/// Construction (CC 2023). https://doi.org/10.1145/3578360.3580273.
/// https://arxiv.org/abs/2204.02013
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